1. Field of the Invention
The present invention relates to a power supply circuit for an oscillator of a semiconductor memory device and a voltage pumping device using the same, and more particularly to a power supply circuit for an oscillator and a voltage pumping device using the same that can increase a cycle length of an output pulse signal from the oscillator by supplying a relatively low voltage to the oscillator as the level of an external power supply voltage is increased.
2. Description of the Related Art
Conventionally, a Dynamic Random Access Memory (DRAM) is a random access memory capable of writing data to a memory cell consisting of one transistor and one capacitor or reading data from the memory cell. Because the DRAM employs an N-Channel Metal Oxide Semiconductor (NMOS) transistor as a transistor configuring the memory cell, a voltage pumping device for driving a word line is used which takes into account voltage loss due to a threshold voltage Vt to generate a sum of an external power supply voltage Vdd, the threshold voltage Vt and a voltage difference AV.
A voltage that is the threshold voltage Vt higher than a source voltage must be applied to a gate of the NMOS transistor so that the NMOS transistor mainly used in the DRAM cell can be turned on. In order that the voltage of a full Vdd level can be read from the cell or bit line or can be written to the cell or bit line because a level of the maximum voltage applied to the DRAM is typically a Vdd level, a raised voltage equal to or higher than the voltage Vdd+Vt must be applied to the gate of the NMOS transistor. Thus, in order for a word line of the DRAM device to be driven a need exists for a voltage pumping device generating the raised voltage, i.e., a high voltage Vpp.
FIG. 1 is a block diagram illustrating a conventional voltage pumping device.
The conventional voltage pumping device includes a high-voltage level detector 100 for detecting a high voltage (Vpp) level signal fed back from a high-voltage pump 400 and generating a high-voltage pumping enable signal ppe; an oscillator 200 for generating a predetermined pulse signal osc1 in response to the high-voltage pumping enable signal ppe; a pump controller 300 for outputting pump drive control signals in response to the pulse signal osc1 applied from the oscillator 200; and the high-voltage pump 400 for pumping the high voltage Vpp with a predetermined voltage level in response to the pump drive control signals.
According to the above-described constitution, the voltage pumping device generates the high voltage Vpp.
Operation of the voltage pumping device will be described in detail with reference to FIG. 2.
First, when the high-voltage level detector 100 detects the high voltage (Vpp) level signal fed back from the high-voltage pump 400 and generates the high-voltage enable signal ppe, the oscillator 200 generates the predetermined pulse signal osc1 in response to the high-voltage pumping enable signal ppe. Subsequently, the pump controller 300 generates the pump drive control signals p1, p2, g1 and g2 in response to the pulse signal osc1 applied from the oscillator 200. Subsequently, the high-voltage pump 400 performs an operation for pumping the high voltage Vpp with the predetermined voltage level in response to the pump drive control signals p1, p2, g1 and g2.
The pump drive control signals p1 and p2 are inputted into input terminals of capacitors C1 and C2, respectively. The pump drive control signals g1 and g2 are inputted into input terminals of capacitors C3 and C4, respectively. When the input terminal of the capacitor C3 is coupled to a high level signal by the pump drive control signal g1, an NMOS transistor N100 is turned on and a node A is driven at an external power supply voltage Vdd. Subsequently, when the voltage of an input node of the capacitor C1 is switched from a ground voltage to the external power supply voltage Vdd by the pump drive control signal p1, the voltage of the node A is raised to “2×Vdd” by the capacitor C1.
Subsequently, as the pump drive control signal p2 is a low level signal and the pump drive control signal g2 is a Vdd level signal, an NMOS transistor N200 is turned on and a node B is driven at the external power supply voltage Vdd. Since the node B driven at the external power supply voltage Vdd is coupled to a gate of a P-Channel Metal Oxide Semiconductor (PMOS) transistor P100, a voltage difference between the node A held at the voltage 2×Vdd and the node B held at the external power supply voltage Vdd is equal to or greater than the threshold voltage Vt. Thus, the PMOS transistor P100 is turned on and then transfers the voltage 2×Vdd to the high-voltage (Vpp) node.
Subsequently, when the pump drive control signal p2 is a Vdd level signal and the pump drive control signal p1 is a low level signal, operation of the node B is as follows. The voltage 2×Vdd is transferred from the node B to the high-voltage (Vpp) node. Consequently, the voltage pumping device repeats the above-described operation and continuously performs a pumping operation so that the high-voltage (Vpp) level can reach a targeted level and the targeted level can be maintained.
However, the oscillator 200 supplying the pulse signal osc1 to the pump controller 300 typically uses the external power supply voltage as a source voltage for a chain of inverters IN1 to IN6. Thus, when the external power supply voltage Vdd is increased, there is a problem in that device operation characteristics maybe degraded.
That is, when a power supply voltage is increased, an operating rate of the chain of inverters IN1 to IN6 constituting the oscillator 200 is increased. If the external power supply voltage Vdd supplied to the inverters IN1 to IN6 is increased, the operating rate is increased. Thus, a cycle length of the clock signal osc1 oscillated by the oscillator 200 constituted by the inverters IN1 to IN6 is reduced (refer to FIG. 8). In response to the pump drive control signals p1, p2, g1 and g2 generated from the pump controller 300 receiving the clock signal osc1 with the reduced cycle length, the high-voltage pump 400 performs the above-described voltage pumping operation. However, as the cycle length of the clock signal osc1 is reduced in the conventional voltage pumping device, an amount of voltage to be pumped at one time is excessive. For this reason, there is a problem in that unnecessary noise occurs and then electric current consumption is increased.